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2.4GHz to 2.5GHz 802.11g/b
RF Transceivers with Integrated PA
Block Diagrams/Typical Operating Circuits
RX BASEBAND HPF
MODE
CORNER FREQUENCY
CONTROL
TX INPUT
CONTROL
RX I OUTPUTS
48
47
46
45
44
43
42
41
40
39
38
37
V CCLNA
1
MUX
36
RXBBQ+
RX Q
GNDRXLNA
2
MAX2831
TO
35
RXBBQ-
OUTPUTS
RX INPUT
RX/TX
GAIN CONTROL
B6
3
RSSI
RSSI
MUX
MUX
34
B4
RX/TX GAIN
CONTROL
RXRF+
4
33
BYPASS
RXRF-
5
90 °
32
TUNE
RX GAIN
CONTROL
B7
V CCPA
6
7
IMUX QMUX
0 °
PLL
31
30
GNDVCO
V CCVCO
TX OUTPUT
RX/TX GAIN
CONTROL
B3
TXRF+
8
9
AM
DETECTOR
TEMP
÷
CRYSTAL
OSCILLATOR/
BUFFER
29
28
CTUNE
XTAL
TXRF-
10
SENSOR TO RSSI
MUX
27
V CCXTAL
RX/TX GAIN
CONTROL
MODE CONTROL
B2
SHDN
11
12
TEMP
SENSOR
RSSI
POWER DETECTOR
RSSI
MUX
SERIAL
INTERFACE
÷
26
25
GNDCP
V CCCP
13
14
15
16
17
18
19
20
21
22
23
24
RX/TX GAIN
REFERENCE
RX/TX GAIN
CONTROL
SERIAL INPUTS
CLOCK BUFFER
OUTPUT
CONTROL
NOTE: ALL GROUND (PINS 2, 26, AND 31) AND BYPASS CAPACITORS’ GROUND REQUIRE THEIR OWN VIAS TO GROUND.
DO NOT CONNECT THEM TO THE EXPOSED PADDLE GROUND.
18
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